The present invention relates to power transistors, and particularly to high-current discrete insulated-gate field-effect transistors which operate at only modest voltages.
Insulated-gate field-effect transistors are increasingly common in power devices. One outstanding advantage of such transistors is that they are voltage-controlled devices, which permits control circuits and algorithms to be simpler.
Different applications require different combinations of transistor parameters. Various applications may require:
high stand-off voltage; PA0 low on-resistance; PA0 fast switching (at turn-on, turn-off, or both); PA0 tolerance of heavily inductive loads; PA0 pull-up, pull-down, or bidirectional operation; PA0 good thermal stability; and/or PA0 graceful recover from breakdown.
Various device configurations have accordingly been used to satisfy the needs of various applications. One class of devices is trench transistors, which have been proposed for high-current density devices which operate at relatively low voltages (e.g. 30 to 100V max). A number of patents and publications have described trench transistors and methods for fabricating them; see e.g. U.S. Pat. Nos. 4,393,391, 4,344,081, 4,345,265, 4,402,003, 4,791,462, 4,893,160, 4,896,196, 4,914,058, 4,929,991, 4,952,992, 4,956,700, 4,983,535, and 5,034,785, all of which are hereby incorporated by reference. (Power FETs are more generally discussed in the following texts, all of which are hereby incorporated by reference: B. E. Taylor, POWER MOSFET DESIGN (1993); B. J. Baliga, MODERN POWER DEVICES (1987); Grant and Gowar, POWER MOSFETS: THEORY AND APPLICATIONS (1989); and E. Oxner, POWER FETS AND THEIR APPLICATIONS (1982).)
The present application provides a new process and structure for fabricating power trench transistors. According to a first class of innovative process embodiments, a trench transistor is made by a very economical process with two silicon etches. In a second (and more preferred) process embodiment, only one silicon etch is required, and one local oxidation step is omitted.
The first embodiment begins with a P-on-N-on-N+ epitaxial or implanted structure. After formation of a patterned thick oxide, a nitride layer (with an oxide pad under it) is patterned to define deep-body locations. A first silicon etch provides some undercut under the nitride, and the nitride then also provides an implant mask for a P+ body implant. Oxidation and removal of the nitride then permit two subsequent steps to be performed in a self-aligned fashion: first, the trench etch can now be masked by the pattern of the grown oxide. After a gate oxide is grown in the trench, and poly is deposited and patterned, the source implant too can be performed as a self-aligned step. This provides an extremely economical process, which can use as few as six masking steps total.
In one alternative modification to this first class of embodiments, an additional mask is used for the trench etch. This adds cost, but reduces the variability of channel length.
In another alternative modification to this first class of embodiments, the step of patterning the thick oxide can be omitted.
In a second class of embodiments, a single resist patterning step is used to pattern a LOCOS stack and to perform the trench etch. The source and channel diffusions are formed before the trench etch, and are unpatterned (so this is not a DMOS process). After the trench etch a gate oxide is formed on the trench sidewalls, and polysilicon is then conformally deposited and etched. The duration of the polysilicon etch is not long enough to clear it from the trenches, so (in addition to the patterned polysilicon lines at the surface) a buried insulated mesh of polysilicon runs wherever the trenches run. An oxidation step forms thick oxide over the poly, and the LOCOS stack is then stripped to expose the N+ source diffusion. A patterned silicon etch and implant now form the deep body diffusions, and metal is then deposited and patterned.
Either of these embodiments provides an extremely planar power device structure which can be fabricated by a very simple process sequence.